Verible's formatter fails to lex/parse input #2359
Description
Test case
module module_0 ( ) ;
assign id_9 [ -1 - -1 ] = 0 ;
endmoduleCommand used: verible-verilog-format example.v --inplace
Actual output
example.v: Error lex/parsing-ing formatted output. Please file a bug.
First error: token: "--" at 3:17-18:; problematic formatter output is
module module_0 ();
assign id_9[-1--1] = 0;
endmodule
<<EOF>>Version used
<unknown-git-version>
Commit 2025-02-06
Built 2025-02-20T11:40:59Z